Short description of project
The key challenge of next-generation GHz wideband RF transceivers using the sophisticated modulation scheme (e.g., 1024-QAM) lies on the development of a power-efficient local oscillator (LO) generator with significantly improved RMS jitter and spurs. The sub-sampling PLL holds the promise of low RMS jitter by greatly suppressing the charge pump noise, but only limited to integer-N operation. To enable fractional-N operation, the digital sampling PLL using a digital-to-time converter (DTC) assisted ADC to mimic a high-resolution TDC can achieve low RMS jitter. However, its voltage-to-time (V2T) conversion gain and thus the fractional spur performance is sensitive to the PVT variations. This project proposes novel local-oversampling digital PLL architectures that can continuously track the variation of the V2T conversion gain by directly recovering the DCO output waveform using the multiple sampled data within one REF cycle, resulting in low RMS jitter and spurs against PVT variations. The local oversampling scheme can also significantly shorten the PLL locking time. Due to the digital intensive designs for waveform synthesis, phase extraction, and delay calibration, the proposed digital PLL architectures will also benefit from the speed and density advancement of ultra-scaled CMOS technologies.
Information of Offered Internship
Level of Internship Hours per Month
Level 1 - 40 hours
Commencement Month
July
Duration
5 Months
Internship requirements: i.e. work, practice and training
1. Introduction of the basic procedures of how the integrated circuit (chip) is designed, fabricated and measured.
2. Introduction of the research works from the PI's group at the state-key Laboratory of the analog and mixed-signal VLSI.
3. Training of the software for integrated circuit design.
4. Design one of the following circuit building blocks: amplifier, oscillator, an accelerator for the deep neural network (DNN), etc. We would consider both the student's interest and the project requirement for the choice of the circuit block later.
2. Introduction of the research works from the PI's group at the state-key Laboratory of the analog and mixed-signal VLSI.
3. Training of the software for integrated circuit design.
4. Design one of the following circuit building blocks: amplifier, oscillator, an accelerator for the deep neural network (DNN), etc. We would consider both the student's interest and the project requirement for the choice of the circuit block later.